| Title | : | Chip Design: Synthesis and Physical Design Workshop |
| Speaker | : | Nikhil Pathrabe and Purushothaman Ramakrishnan (Synopsis) |
| Details | : | Sat, 15 Feb, 2025 12:00 AM @ RISE LAB |
| Abstract: | : | Nikhil Pathrabe of Synopsys and Purushothaman Ramakrishnan of RISE Lab (Department of Computer Science and Engineering, IITM) will be conducting a 2-day Synthesis and Physical Design Workshop at IIT Madras for chip design enthusiasts. The workshop will be tentatively held on February 15-16, 2025.
Please sign up for the workshop via - https://forms.gle/KdvGnB2UjsjHnALSA. -------------------- Workshop Details -------------------- Topic: Chip Design: Synthesis and Physical Design Workshop Tentative dates: February 15 - 16, 2025 Theory: Latest technology trends in Semiconductor industry ASIC Design flow Synthesis basics Physical Design (Floorplan, Placement, Clock Tree Synthesis, Routing and optimization) Physical verification Labs: Handling Synopsys tool and GUI (IC-Compiler-II/Fusion-Compiler) Initiating floorplan & implementing power-plan Placement of cells and macros Clock tree synthesis and optimization Routing and optimization Speaker description: Nikhil Pathrabe works for Synopsys and has about 8 years experience in SoC Physical Design and Synthesis, and has knowledge on the latest technology trends in the Semiconductor(Micro-electronics/VLSI) industry. He has experience in working on sub-micron technology nodes TSMC-2nm, TSMC-3nm, Samsung 7nm, etc. and supports various clients such as Nvidia, MediaTek, Qualcomm, startups, etc. Profile: linkedin.com/in/nikhil-pathrabe-13718775 Purushothaman Ramakrishnan works in Shakti (RISE) Lab, Computer Science Department, IITM, as Senior Project Advisor and has about 35 years of experience in VLSI. Before joining IITM in 2018, he worked in Semiconductor Laboratory Chandigarh, Cypress Semiconductors, and Broadcom, Bangalore. He covers the Synthesis and Physical Design part of the CS6230 course at CSE, IITM. |
