Title | : | MBZip: Multi-block cache compression |
Speaker | : | Raghavendra (IITM) |
Details | : | Fri, 31 Jul, 2015 3:00 PM @ BSB 361 |
Abstract: | : | In multi-core systems, shared last-level-cache (LLC) is a critical resource. As more number of applications are run on a multi-core system, effective utilization of the LLC capacity is the key. Ideally, the capacity of an LLC should be large enough to hold the working set of multiple applications, preventing the costly DRAM accesses. But increasing the LLC size beyond a limit incurs significant area and power overhead. Cache compression techniques play an important role in improving system performance by increasing the effective LLC capacity. These techniques compress a single cache block by exploiting various data patterns present within a block: such as zeros, frequent values (frequent values stored in a cache block are encoded so that data values can be represented as series of codes), frequent patterns (frequently occurring data patterns are dynamically identified and stored with fewer number of bits), and base-delta-immediate (BDI) (small deltas between the data values in a cache block are exploited for compression). In this work we propose a simple yet efficient mechanism to compress multiple cache blocks at the LLC and the main memory (DRAM). To index into the compressed blocks, we propose a simple modification to the tag structure that provides an effective way to access multiple cache blocks without incurring any additional indirection latency. We evaluate MBZip across a wide variety of workloads and compare its performance to a baseline system using state of the art compression technique. Our mechanism significantly increases the system performance and also provides bandwidth savings at the DRAM which can further be exploited by prefetchers to aggressively prefetch data from the main memory. |