Title | : | Variable Sized Cache-Block Compaction |
Speaker | : | Sayantan Ray (IITM) |
Details | : | Fri, 31 May, 2019 10:00 AM @ A M Turing Hall |
Abstract: | : | With limited space available on-chip, we need to fit as much data into the last-level caches (LLCs) as possible, and cache compression is a popular choice for doing so. Compression is the process of representing data using fewer bits. To make the most of the saved space, we also need an efficient compaction technique that fits these compressed blocks together inside the LLC and keeps track of all the additional data without significant overheads. An ideal compression-compaction combination should satisfy the following three criteria - i) low internal fragmentation, ii) low access latency, and iii) low storage overheads. We can eliminate internal fragmentation by compacting variable sized compressed blocks into a single block but at the cost of high storage overhead. Previous works that deal with the storage overhead had to settle with fixed size compaction, which led to the wastage of valuable cache space.
In this talk, we propose Variable Sized Cache-block Compaction (VSCC), which allows compaction of variable sized compressed blocks into a single cache block, without the need for indirection using additional tag structures. We achieve this by calculating the location of a compressed block using its compression encoding available in the tag metadata. We modify the read/write scheme in a manner that benefits our compaction scheme by reducing the tracking operations to 50%. VSCC reduces internal fragmentation while maintaining low storage overheads compared to earlier works. Experimental results reveal that, on average (geometric mean), VSCC reduces the miss rate by 33.8% (25.2%), improves IPC by 10.7% (18.4%), reduces energy by 13.9% (3.5%) and doubles the effective cache capacity over a baseline LLC for single-core (4-core) workloads. We show that VSCC with super-block of size 8 outperforms the state-of-the-art techniques such as Yet Another Compressed Cache and Decoupled Compressed Cache from the performance and energy point of view. |