| Title | : | SHAKTI-T: A Secure Microprocessor |
| Speaker | : | Arjun Menon C. (IITM) |
| Details | : | Fri, 15 Jun, 2018 12:00 AM @ A M Turing Hall |
| Abstract: | : | With increased usage of compute cores for sensitive applications, including e-commerce, there is a need to provide additional hardware support for securing information from memory based attacks. This work presents a unified hardware framework for handling spatial and temporal memory attacks. Further, we integrate the proposed hardware framework with a RISC-V based micro-architecture and demonstrate the effectiveness of the proposed scheme through case studies, in addition to taking the design through a VLSI CAD design flow. The proposed processor reduces the metadata storage overhead up to 4× in comparison with the existing solutions, while incurring an area overhead of just 1914 LUTs and 2197 flip flops on an FPGA, without affecting the critical path delay of the processor. |
