| Title | : | Emerging Computing Techniques for Low Power Error Resilient Design |
| Speaker | : | Neel Talakshi Gala (IITM) |
| Details | : | Wed, 5 Oct, 2016 9:30 AM @ Meeting Room 1 |
| Abstract: | : | One of the oldest and amazing computing engines presented to mankind by nature is the Brain. It remains to be one of the toughest unsolved mystery in the annals of electronics and computer engineering to explain how the brain manages to perform complex tasks consuming very less time, less power and occupying very small area, that conventional Boolean compute engines take long time to complete, consuming megawatts of power and occupying many square feets of area. The objective of this thesis is to understand the computations carried out by the brain and attempt to bridge the gap between brain and the conventional computing models. A careful observation of the brain reveals that the computations performed by it need not necessarily be perfect and for many decisions an approximate computation yields the desired results. This approximate property can be leveraged for modern day application by building approximate computing systems which consume less power and area while providing a good-enough output. This thesis proposes several VLSI CAD techniques to design such accuracy tunable approximate circuits. Another fascinating property of the brain is its high level of fault tolerance. The brain is not only subjected to noisy input data but also encounters the death of several of its neurons is yet able to function flawlessly. The thesis adopts this property of fault tolerance in the context of approximate applications and proposes low overhead stochastic fault checkers. All the above statements treat the Brain as a Boolean/Digital entity. However, the major difference between the human Brain and computer systems is the fact that the Brain computes efficiently on Analog data while computers squander significant energy in converting Analog data to Digital domain and running large applications for better quality rendering them highly inefficient as compared to the Brain. In view of this, the thesis proposes an accuracy tunable Non-Boolean coupled oscillator based co-processor for executing a variety of modern day workloads while providing considerable benefits. |
