Research Publications -@ CSE-IITM

Publications by the members of CSE Department :

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JUGAAD: Comprehensive Malware Behavior-as-a-Service.

Sareena Karapoola, Nikhilesh Singh, Chester Rebeiro, V. Kamakoti
Appeared in CSET 2022: Cyber Security Experimentation and Test Workshop, Virtual Event, 8 August 2022 (CSET 2022), pp.39-48, Aug 2022.

Building the SHAKTI microprocessor.

V. Kamakoti
Appeared in Commun. ACM, Vol 65, pp.48-51, 2022.

Depending on HTTP/2 for Privacy? Good Luck!

Gargi Mitra, Prasanna Karthik V, Patanjali SLPSK, Nitin Chandrachoodan, V. Kamakoti
Appeared in 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2020, Valencia, Spain, June 29 - July 2, 2020 (DSN 2020), pp.278-285, Jul 2020.

VNF-DOC: A Dynamic Overload Controller for Virtualized Network Functions in Cloud.

Sudhakar Murugasen, Shankar Raman, V. Kamakoti
Appeared in Advanced Information Networking and Applications - Proceedings of the 34th International Conference on Advanced Information Networking and Applications, AINA-2020, Caserta, Italy, 15-17 April [canceled because of the COVID-19 crisis]., Advances in Intelligent Systems and Computing, Vol 1151, pp.642-656, Apr 2020.

Sparsity-Aware Caches to Accelerate Deep Neural Networks.

Vinod Ganesan, Sanchari Sen, Pratyush Kumar, Neel Gala, V. Kamakoti, Anand Raghunathan
Appeared in 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020 (DATE 2020), pp.85-90, Mar 2020.

ProBLeSS: A Proactive Blockchain Based Spectrum Sharing Protocol Against SSDF Attacks in Cognitive Radio IoBT Networks.

Milan Patnaik, G. Prabhu, Chester Rebeiro, Vashek Matyas, V. Kamakoti
Appeared in IEEE Netw. Lett., Vol 2, pp.67-70, 2020.

Brutus: Refuting the Security Claims of the Cache Timing Randomization Countermeasure Proposed in CEASER.

Rahul Bodduna, Vinod Ganesan, Patanjali SLPSK, V. Kamakoti, Chester Rebeiro
Appeared in IEEE Comput. Archit. Lett., Vol 19, pp.9-12, 2020.

Scalable pseudo-exhaustive methodology for testing and diagnosis in flow-based microfluidic biochips.

Gokulkrishnan Vadakkeveedu, V. Kamakoti, Nitin Chandrachoodan, Seetal Potluri
Appeared in IET Computers & Digital Techniques, Vol 14, pp.122-131, 2020.

Net-Police: A network patrolling service for effective mitigation of volumetric DDoS attacks.

Sareena Karapoola, Prasanna Karthik V, Shankar Raman, V. Kamakoti
Appeared in Comput. Commun., Vol 150, pp.438-454, 2020.

Karna: A Gate-Sizing based Security Aware EDA Flow for Improved Power Side-Channel Attack Protection.

Patanjali SLPSK, Prasanna Karthik V, Chester Rebeiro, V. Kamakoti
Appeared in Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019 (ICCAD 2019), pp.1-8, Nov 2019.

White Mirror: Leaking Sensitive Information from Interactive Netflix Movies using Encrypted Traffic Analysis.

Gargi Mitra, Prasanna Karthik V, Patanjali SLPSK, Nitin Chandrachoodan, V. Kamakoti
Appeared in Proceedings of the ACM SIGCOMM 2019 Conference Posters and Demos, SIGCOMM 2019, Beijing, China, August 19-23, 2019 (SIGCOMM 2019), pp.122-124, Aug 2019.

Towards Identifying Early Indicators of a Malware Infection.

Sareena Karapoola, Chester Rebeiro, Unnati Parekh, V. Kamakoti
Appeared in Proceedings of the 2019 ACM Asia Conference on Computer and Communications Security, AsiaCCS 2019, Auckland, New Zealand, July 09-12, 2019, pp.679-681, Jul 2019.

SHAKTI-MS: a RISC-V processor for memory safety in C.

Sourav Das, R. Harikrishnan Unnithan, Arjun Menon C., Chester Rebeiro, V. Kamakoti
Appeared in Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2019, Phoenix, AZ, USA, June 23-23, 2019 (LCTES 2019), pp.19-32, Jun 2019.

Towards Measuring Quality of Service in Untrusted Multi-Vendor Service Function Chains: Balancing Security and Resource Consumption.

Prasanna Karthik V, Gargi Mitra, Vignesh Manoharan, Chester Rebeiro, Byrav Ramamurthy, V. Kamakoti
Appeared in 2019 IEEE Conference on Computer Communications, INFOCOM 2019, Paris, France, April 29 - May 2, 2019 (INFOCOM 2019), pp.163-171, May 2019.

PROLEMus: A Proactive Learning-Based MAC Protocol Against PUEA and SSDF Attacks in Energy Constrained Cognitive Radio Networks.

Milan Patnaik, V. Kamakoti, Vashek Matyas, Vojtech Rehk
Appeared in IEEE Trans. Cogn. Comm. & Networking, Vol 5, pp.400-412, 2019.

MLTimer: Leakage Power Minimization in Digital Circuits Using Machine Learning and Adaptive Lazy Timing Analysis.

Patanjali SLPSK, Milan Patnaik, Seetal Potluri, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 14, pp.285-301, 2018.

GANDALF: A Fine-Grained Hardware-Software Co-Design for Preventing Memory Attacks.

Gnanambikai Krishnakumar, Patanjali SLPSK, Prasanna Karthik V, Chester Rebeiro, V. Kamakoti
Appeared in Embedded Systems Letters, Vol 10, pp.83-86, 2018.

ApproxBC: Blockchain Design Alternatives for Approximation-Tolerant Resource-Constrained Applications.

Prasanna Karthik V, Gargi Mitra, Chester Rebeiro, Byrav Ramamurthy, V. Kamakoti
Appeared in IEEE Communications Standards Magazine, Vol 2, pp.45-51, 2018.

An Accuracy Tunable Non-Boolean Co-Processor Using Coupled Nano-Oscillators.

Neel Gala, Sarada Krithivasan, Wei-Yu Tsai, Xueqing Li, Vijaykrishnan Narayanan, V. Kamakoti
Appeared in JETC, Vol 14, pp.1:1-1:28, 2018.

A scalable pseudo-exhaustive search for fault diagnosis in microfluidic biochips.

V. Gokulkrishnan, V. Kamakoti, Nitin Chandrachoodan, Seetal Potluri
Appeared in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017, Cambridge, United Kingdom, October 23-25, 2017 (DFT 2017), pp.1-4, Oct 2017.

A Programmable Event-driven Architecture for Evaluating Spiking Neural Networks.

Arnab Roy, Swagath Venkataramani, Neel Gala, Sanchari Sen, V. Kamakoti, Anand Raghunathan
Appeared in 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017 (ISLPED 2017), pp.1-6, Jul 2017.

Shakti-T: A RISC-V Processor with Light Weight Security Extensions.

Arjun Menon C., Subadra Murugan, Chester Rebeiro, Neel Gala, V. Kamakoti
Appeared in Proceedings of the Hardware and Architectural Support for Security and Privacy, HASP@ISCA 2017, Toronto, ON, Canada, June 25, 2017, pp.2:1-2:8, Jun 2017.

Optimal Don't Care Filling for Minimizing Peak Toggles During At-Speed Stuck-At Testing.

Satya Trinadh Adireddy, Seetal Potluri, Ch. Sobhan Babu, V. Kamakoti, Shiv Govind Singh
Appeared in ACM Trans. Design Autom. Electr. Syst., Vol 23, pp.5:1-5:26, 2017.

Approximate Error Detection With Stochastic Checkers.

Neel Gala, Swagath Venkataramani, Anand Raghunathan, V. Kamakoti
Appeared in IEEE Trans. VLSI Syst., Vol 25, pp.2258-2270, 2017.

STOCK: Stochastic Checkers for Low-overhead Approximate Error Detection.

Neel Gala, Swagath Venkataramani, Anand Raghunathan, V. Kamakoti
Appeared in Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ISLPED 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016 (ISLPED 2016), pp.266-271, Aug 2016.

Component fault localization using switching current measurements.

Seetal Potluri, Satya Trinadh, Siddhant Saraf, V. Kamakoti
Appeared in 21th IEEE European Test Symposium, ETS 2016, Amsterdam, Netherlands, May 23-27, 2016 (ETS 2016), pp.1-2, May 2016.

ProMAC: A proactive model predictive control based MAC protocol for cognitive radio vehicular networks.

N. Sathya Narayanan, Milan Patnaik, V. Kamakoti
Appeared in Computer Communications, Vol 93, pp.27-38, 2016.

ChADD: An ADD Based Chisel Compiler with Reduced Syntactic Variance.

Vikas Chauhan, Neel Gala, V. Kamakoti
Appeared in 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016 (VLSID 2016), pp.499-504, Jan 2016.

SHAKTI Processors: An Open-Source Hardware Initiative.

Neel Gala, Arjun Menon C., Rahul Bodduna, G. S. Madhusudan, V. Kamakoti
Appeared in 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016 (VLSID 2016), pp.7-8, Jan 2016.

Power Consumption versus Hardware Security: Feasibility Study of Differential Power Attack on Linear Feedback Shift Register Based Stream Ciphers and Its Countermeasures.

Sanjay Burman, , Debdeep Mukhopadhyay, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 12, pp.99-106, 2016.

SHAKTI-F: A Fault Tolerant Microprocessor Architecture.

Sukrat Gupta, Neel Gala, G. S. Madhusudan, V. Kamakoti
Appeared in 24th IEEE Asian Test Symposium, ATS 2015, Mumbai, India, November 22-25, 2015 (ATS 2015), pp.163-168, Nov 2015.

DP-fill: a dynamic programming approach to X-filling for minimizing peak test power in scan tests.

Satya Trinadh, Ch. Sobhan Babu, Shiv Govind Singh, , V. Kamakoti
Appeared in Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015 (DATE 2015), pp.836-841, Mar 2015.

DFT Assisted Techniques for Peak Launch-to-Capture Power Reduction during Launch-On-Shift At-Speed Testing.

, Satya Trinadh, Ch. Sobhan Babu, V. Kamakoti, Nitin Chandrachoodan
Appeared in ACM Trans. Design Autom. Electr. Syst., Vol 21, pp.14, 2015.

ProWATCh: A Proactive Cross-Layer Workload-Aware Temperature Management Framework for Low-Power Chip Multi-Processors.

Milan Patnaik, Chidhambaranathan Rajamanikkam, Chirag Garg, Arnab Roy, V. R. Devanathan, Shankar Balachandran, V. Kamakoti
Appeared in JETC, Vol 12, pp.22, 2015.

Framework for Selective Flip-Flop Replacement for Soft Error Mitigation.

Pavan Vithal Torvi, V. R. Devanathan, V. Kamakoti
Appeared in 28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015 (VLSID 2015), pp.381-386, Jan 2015.

Generating synthetic benchmark circuits for accelerated life testing of field programmable gate arrays using genetic algorithm and particle swarm optimization.

L. Srivani, N. H. V. Krishna Giri, Shankar Ganesh, V. Kamakoti
Appeared in Appl. Soft Comput., Vol 27, pp.179-190, 2015.

Best is the Enemy of Good: Design Techniques for Low Power Tunable Approximate Application Specific Integrated Chips Targeting Media-Based Applications.

Neel Talakshi Gala, V. R. Devanathan, V. Visvanathan, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 11, pp.133-148, 2015.

ProCA: Progressive Configuration Aware Design Methodology for Low Power Stochastic ASICs.

Neel Talakshi Gala, V. R. Devanathan, Karthik Srinivasan, V. Visvanathan, V. Kamakoti
Appeared in 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014, pp.342-347, Jan 2014.

ReMap: A Novel Automated Peephole Optimization Based Approach for Logic, Delay and Power Minimization.

K. Shyamala, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 10, pp.20-31, 2014.

XStat: StatisticalX-Filling Algorithm for Peak Capture Power Reduction in Scan Tests.

Satya Trinadh, , Shankar Balachandran, Ch. Sobhan Babu, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 10, pp.107-115, 2014.

Using timers to switch-off TCAM banks in routers.

M J Shankar Raman, V. Kamakoti, Balaji Venkat, Gaurav Raina
Appeared in IEEE International Conference on Advanced Networks and Telecommunications Systems, ANTS 2013, Kattankulathur, India, December 15-18, 2013 (ANTS 2013), pp.1-6, Dec 2013.

A syllable based statistical text to speech system.

Abhijit Pradhan, S. Aswin Shanmugam, Anusha Prakash, V. Kamakoti, Hema A. Murthy
Appeared in 21st European Signal Processing Conference, EUSIPCO 2013, Marrakech, Morocco, September 9-13, 2013 (EUSIPCO 2013), pp.1-5, Sep 2013.

PinPoint: An algorithm for enhancing diagnostic resolution using capture cycle power information.

, Satya Trinadh, Roopashree Baskaran, Nitin Chandrachoodan, V. Kamakoti
Appeared in 18th IEEE European Test Symposium, ETS 2013, Avignon, France, May 27-30, 2013 (ETS 2013), pp.1, May 2013.

A Novel Algorithm for Fast Synthesis of DNA Probes on Microarrays.

S. Srinivasan, V. Kamakoti, A. Bhattacharya
Appeared in JETC, Vol 9, pp.1, 2013.

Supply and Body-Bias Voltage Assignment Based Technique for Power and Temperature Control on a Chip at Iso-Performance Conditions.

Virat Gandhi, V. R. Devanathan, V. Visvanathan, Milan Patnaik, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 9, pp.207-228, 2013.

An Efficient Heuristic for Peak Capture Power Minimization During Scan-Based Test.

Satya Trinadh, , Ch. Sobhan Babu, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 9, pp.264-274, 2013.

The Implications of Shared Data Synchronization Techniques on Multi-Core Energy Efficiency.

Ashok Gautham J., Kunal Korgaonkar, Patanjali SLPSK, Shankar Balachandran, V. Kamakoti
Appeared in 2012 Workshop on Power-Aware Computing Systems, HotPower'12, Hollywood, CA, USA, October 7, 2012, Oct 2012.

A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands.

Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
Appeared in J. Electrical and Computer Engineering, Vol 2012, pp.537286:1-537286:12, 2012.

Thermal-Safe Dynamic Test Scheduling Method Using On-Chip Temperature Sensors for 3D MPSoCs.

Rama Kumar Pasumarthi, V. R. Devanathan, V. Visvanathan, , V. Kamakoti
Appeared in J. Low Power Electronics, Vol 8, pp.684-695, 2012.

Interconnect Aware Test Power Reduction.

, Nitin Chandrachoodan, V. Kamakoti
Appeared in J. Low Power Electronics, Vol 8, pp.516-525, 2012.

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Department of Computer Science & Engineering

Indian Institute of Technology Madras, Chennai, India.