PACE Lab : Programming Languages, Architecture, Compilers Education LaboratoryLink to Lab Webpage

Research AreasMemory System Design, Network-on-chip architectures, Cache Design in Multicore, Program Analysis, Parallelization, Code Optimization.
MembersFaculty : Madhu Mutyam, V. Krishna Nandivada, Rupesh Nasre.

Students/Scholars :
Project Staffs :

Recent Publications
  • A Scalable and Energy-efficient Concurrent Binary Search Tree with Fatnodes
           Praveen Kumar Alapati , Venkata Kalyan Tavva , Madhu Mutyam
          Appeared in IEEE Transactions on Sustainable Computing, Feb 2020
  • Concurrent Treaps and Impact of Locking Objects
           Praveen Kumar Alapati , Madhu Mutyam , Swami Saranam
          Appeared in New Generation Computing Journal, Feb 2020
  • Endurance enhancement of write-optimized STT-RAM caches.  
           Puneet Saraf , Madhu Mutyam
          Appeared in Proceedings of the International Symposium on Memory Systems, MEMSYS 2019, Washington, DC, USA, September 30 - October 03, 2019., pp.101-113, Oct 2019
  • POSTER: Variable Sized Cache-Block Compaction.  
           Sayantan Ray , Madhu Mutyam
          Appeared in 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019, Seattle, WA, USA, September 23-26, 2019, pp.471-472, Sep 2019
  • Gluon-Async: A Bulk-Asynchronous System for Distributed and Heterogeneous Graph Analytics.  
           Roshan Dathathri , Gurbinder Gill , Loc Hoang , Vishwesh Jatala , Keshav Pingali , V. Krishna Nandivada , Hoang-Vu Dang , Marc Snir
          Appeared in 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019, Seattle, WA, USA, September 23-26, 2019, pp.15-28, Sep 2019

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