CS6600 - Computer Architecture

Course Data :

Review of Computer Organization: Data representation. Design of arithmetic circuits, Instruction representation, CISC and RISC architectures, Memory hierarchy. Memory management, Input/output control mechanisms Fundamentals of Processor Design: Instruction set processor design, Exploitation of instruction-level parallelism, Processor microarchitecture, Principles of processor performance Pipelined Processor Architecture: Fundamentals of pipelining, Arithmetic pipeline design, Instruction pipeline design, Balancing pipeline stages, Stalls in pipeline, Methods for reduction of stalls in pipeline Superscalar Processor Architecture: Limitation of scalar pipelines, Superscelar pipelines, Dynamic exploitation of instructicn-level parallelism, Register dataflow techniques, Memory dataflow techniques, Instruction flow techniques, Case studies of superscalar processor architecture Advanced Processor Architectures: Multithreaded processors, Reconfigurable instruction set processors Storage System Architecture: RAID architecture, Storage area networks, Network attached storage Large Computer System Architectures: Symmetric multiprocessor systems - Shared memory systems, Shared bus architectures - Cache coherence protocols, MESI protocol and Coherence in multi-level cache systems, Interconnection network architectures - Directory protocol for cache coherence Experiments related to the above topics

Pre-Requisites

    None

Parameters

Credits Type Date of Introduction
4 Elective (Core Course)

Previous Instances of the Course


© 2016 - All Rights Reserved - Dept of CSE, IIT Madras
Website Credits